A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g., comprising part of, one, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the “scanning”-direction) while synchronously scanning the substrate parallel or anti parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.
For coarse optical alignment of a wafer in a lithographic apparatus, a mark structure (mark) is known, which comprises three parallel lines. The parallel lines are arranged in a scribe lane of the wafer and extend in the longitudinal direction of the scribe lane. Of the three lines of the mark, one pair of adjacent lines has a first pitch and the other pair of adjacent lines has a second pitch. The first and second pitch extend along the width direction of the scribe lane and the first pitch is different from the second pitch.
An optical alignment scan is performed along a scan path in this pitch direction (thus scan data is also gathered outside the scribe lane). The optical alignment scan is based on so-called self-referencing interferometry to obtain a scan data signal from the mark. The used self-referencing interferometry has been described in EP 1372040, which is incorporated by reference herein in its entirety. The position of the mark can be obtained by searching in the scan data signal for a signal portion that matches the two pitches of the mark-design, for example by a pattern recognition procedure. The location of the matching signal portion in the scan data signal relates to the position of the mark within the scan path.
It is however observed that when using the mark it is only possible to select an aligned position based on two pitches. It can happen that product structures, next to the mark and outside the scribe lane, resemble one or both of these pitches, which causes a misalignment.
Moreover, because any device structure next to the mark will cause interference with the mark itself, this will disturb the alignment performance. Therefore, the mark has an exclusion, zone which must be left empty without device structure. For that reason, scribe lanes can not have a width below a minimal value. A reduction to lower values of the scribe lane width is not possible with coarse wafer alignment.